Embedded SoPC Design with Nios ii Processor and VHDL Examples
Explores the unique hardware programmability of FPGA-based embedded systems, using a learn-by-doing approach to introduce the concepts and techniques for embedded SoPC design with Verilog
An SoPC (system on a programmable chip) integrates a processor, memory modules, I/O peripherals, and custom hardware accelerators into a single FPGA (field-programmable gate array) device. In addition to the customized software, customized hardware can be developed and incorporated into the embedded system as well – allowing us to configure the soft-core processor, create tailored I/O interfaces, and develop specialized hardware accelerators for computation-intensive tasks.
Table of Contents
PART I: BASIC DIGITAL CIRCUITS DEVELOPMENT
PART II: BASIC NOIS II SOFTWARE DEVELOPMENT
PART III: CUSTOM I/O PERIPHERAL DEVELOPMENT
PART IV: HARDWARE ACCLERATOR CASE STUDIES
Book Contents :
Chapter 1: Overview of Embedded System.
Chapter 2: Gate-level Combinational Circuit.
Chapter 3: Overview of FPGA and EDA Software.
Chapter 4: RT-level Combinational Circuit.
Chapter 5: Regular Sequential Circuit.
Chapter 6: FSM.
Chapter 7: FSMD.
Chapter 8: Nios II Processor Overview.
Chapter 9: Nios II System Derivation and Low-Level Access.
Chapter 10: Predesigned Nios II I/O Peripherals.
Chapter 11: Predesigned Nios II I/O Drivers and HAL API.
Chapter 12: Interrupt and ISR.
Chapter 13: Custom I/O Peripheral with PIO Cores.
Chapter 14: Avalon Interconnect and SOPC Component.
Chapter 15: SRAM and SDRAM Controllers.
Chapter 16: PS2 Keyboard and Mouse.
Chapter 17: VGA Controller.
Chapter 18: Audio Codec Controller.
Chapter 19: SD Card Controller.
Chapter 20: GCD Accelerator.
Chapter 21: Mandelbrot Set Fractal Accelerator.
Chapter 22: Direct Digital Frequency Synthesis.
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embedded sopc design with nios ii